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ICIP
2005
IEEE
14 years 11 months ago
High throughput 2D DCT/IDCT processor for video coding
This paper describes the architecture of an 8x8 2-D DCT/IDCT processor with high throughput, reduced hardware, and a parallel-pipeline scheme. This architecture allows the process...
Gustavo A. Ruiz, Juan A. Michell, Angel M. Buron
WAE
2001
281views Algorithms» more  WAE 2001»
13 years 11 months ago
Using PRAM Algorithms on a Uniform-Memory-Access Shared-Memory Architecture
The ability to provide uniform shared-memory access to a significant number of processors in a single SMP node brings us much closer to the ideal PRAM parallel computer. In this pa...
David A. Bader, Ajith K. Illendula, Bernard M. E. ...
JSS
2007
115views more  JSS 2007»
13 years 9 months ago
A case study in re-engineering to enforce architectural control flow and data sharing
Without rigorous software development and maintenance, software tends to lose its original architectural structure and become difficult to understand and modify. ArchJava, a recen...
Marwan Abi-Antoun, Jonathan Aldrich, Wesley Coelho
VAMOS
2010
Springer
13 years 11 months ago
Leveraging Aspect-Connectors to Improve Stability of Product-Line Variabilities
Abstract--One of the design goals of Product Line Architectures (PLAs) is to remain stable while accommodating changes of stakeholder's requirements. However, the stability of...
Marcelo Oliveira Dias, Leonardo Tizzei, Ceí...
FLAIRS
2001
13 years 11 months ago
A Background Layer of Health Monitoring and Error Handling for ObjectAgent
ObjectAgent is an agent-based, message-passing software architecture that utilizes natural language processing to provide autonomous control to complex systems. As a form of distr...
Joseph B. Mueller, Derek M. Surka, Joy J. Lin