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» Architecture evaluation for power-efficient FPGAs
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FPGA
2004
ACM
137views FPGA» more  FPGA 2004»
14 years 1 months ago
Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources
As FPGA densities increase, partitioning-based FPGA placement approaches are becoming increasingly important as they can be used to provide high-quality and computationally scalab...
Navaratnasothie Selvakkumaran, Abhishek Ranjan, Sa...
DATE
2009
IEEE
136views Hardware» more  DATE 2009»
14 years 2 months ago
Reconfigurable circuit design with nanomaterials
—It is generally acknowledged that nanoelectronics will eventually replace traditional silicon CMOS in high-performance integrated circuits. To that end, considerable investments...
Chen Dong, Scott Chilstedt, Deming Chen
FCCM
2009
IEEE
189views VLSI» more  FCCM 2009»
14 years 2 months ago
Application Specific Customization and Scalability of Soft Multiprocessors
Although soft microprocessors are widely used in FPGAs, limited work has been performed regarding how to automatically and efficiently generate soft multiprocessors. In this paper...
Deepak Unnikrishnan, Jia Zhao, Russell Tessier
SPAA
2010
ACM
13 years 8 months ago
Buffer-space efficient and deadlock-free scheduling of stream applications on multi-core architectures
We present a scheduling algorithm of stream programs for multi-core architectures called team scheduling. Compared to previous multi-core stream scheduling algorithms, team schedu...
JongSoo Park, William J. Dally
GLOBECOM
2008
IEEE
14 years 2 months ago
Power-Cost-Effective Node Architecture for Light-Tree Routing in WDM Networks
—We present a novel cost-effective multicast capable optical cross connect (MC-OXC) node architecture which improves efficiency of optical power by constraining splitting to only...
G. M. Fernandez, David Larrabeiti, C. Vazquez, P. ...