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» Architecture evaluation for power-efficient FPGAs
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FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 1 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
DAC
2007
ACM
14 years 8 months ago
Compact State Machines for High Performance Pattern Matching
Pattern matching is essential to a wide range of applications such as network intrusion detection, virus scanning, etc. Pattern matching algorithms normally rely on state machines...
Piti Piyachon, Yan Luo
FPGA
1997
ACM
145views FPGA» more  FPGA 1997»
13 years 12 months ago
Generation of Synthetic Sequential Benchmark Circuits
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct problem for FPGA vendors: how to test and evaluate the ...
Michael D. Hutton, Jonathan Rose, Derek G. Corneil
ERSA
2010
217views Hardware» more  ERSA 2010»
13 years 5 months ago
FPGA for Computing the Pixel Purity Index Algorithm on Hyperspectral Images
The pixel purity index algorithm is employed in remote sensing for analyzing hyperspectral images. A single pixel usually covers several different materials, and its observed spect...
Carlos González, Daniel Mozos, Javier Resan...
DAC
2009
ACM
13 years 5 months ago
A physical unclonable function defined using power distribution system equivalent resistance variations
For hardware security applications, the availability of secret keys is a critical component for secure activation, IC authentication and for other important applications including...
Ryan Helinski, Dhruva Acharyya, Jim Plusquellic