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search results - page 34 / 4688
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Architecture
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Performance-Driven Interconnect Design Based on Distributed RC Delay Model
14 years 17 days ago
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Jason Cong, Kwok-Shing Leung, Dian Zhou
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Optimization of Combinational Logic Circuits Based on Compatible Gates
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Maurizio Damiani, Jerry Chih-Yuan Yang, Giovanni D...
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FastHenry: A Multipole-Accelerated 3-D Inductance Extraction Program
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Mattan Kamon, Michael J. Tsuk, Jacob White
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Resolving Signal Correlations for Estimating Maximum Currents in CMOS Combinational Circuits
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Harish Kriplani, Farid N. Najm, Ping Yang, Ibrahim...
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Automatic Technology Mapping for Generalized Fundamental-Mode Asynchronous Designs
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Polly Siegel, Giovanni De Micheli, David L. Dill
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