104 search results - page 10 / 21 » Architectures and Design Techniques for Energy Efficient Emb... |
PDP
2010
IEEE
13 years 11 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
CASES
2001
ACM
13 years 10 months ago
2001
ACM
The general purpose processor has long been the focus of intense optimization efforts that have resulted in an impressive doubling of performance every 18 months. However, recent ...
LCTRTS
2004
Springer
14 years 2 days ago
2004
Springer
This paper proposes energy efficient real-time multi-task scheduling (EDF and RM) algorithms by using buffers. The buffering technique overcomes a drawback of previous approaches ...
IPPS
2008
IEEE
14 years 1 months ago
2008
IEEE
In this paper, we present the design and implementation of a distributed sensor network application for embedded, isolated-word, real-time speech recognition. In our system design...
DAC
2007
ACM
14 years 7 months ago
2007
ACM
It is now common for multimedia applications to be partitioned and mapped onto multiple processing elements of a system-on-chip architecture. An important design constraint in suc...