14 search results - page 1 / 3 » Architectures and FPGA Implementations of the 64-Bit MISTY1 ... |
ISCAS
2005
IEEE
14 years 4 months ago
2005
IEEE
—A high-throughput hardware architecture and FPGA implementation of the 64-bit NESSIE proposal, MISTY1 block cipher, is presented in this paper. This architecture, in contrast to...
JCSC
2006
13 years 11 months ago
2006
CEE
2004
13 years 11 months ago
2004
A performance comparison for the 64-bit block cipher (Triple-DES, IDEA, CAST-128, MISTY1, and KHAZAD) FPGA hardware implementations is given in this paper. All these ciphers are u...
FSE
1997
Springer
14 years 3 months ago
1997
Springer
We propose secret-key cryptosystems MISTY1 and MISTY2, which are block ciphers with a 128-bit key, a 64-bit block and a variable number of rounds. MISTY is a generic name for MISTY...
ISCAS
2008
IEEE
14 years 5 months ago
2008
IEEE
— In the present paper, we introduce high-performance hardware architectures for the 128-bit block cipher CLEFIA and evaluate their ASIC performances in comparison with the ISO/I...