System and processor architectures depend on changes in technology. Looking ahead as die density and speed increase, power consumption and on chip interconnection delay become incr...
We describe an architecture for representing and managing context shifts that supports dynamic data interpretation. This architecture utilizes two layers of learning and three lay...
Nikita A. Sakhanenko, George F. Luger, Carl R. Ste...
Interprocedural data flow analyses of executable programs suffer from the conservative assumptions that need to be made because no precise control flow graph is available and beca...
—Modern compression standards such as H.264, DivX, or VC-1 provide astonishing quality at the costs of steadily increasing processing requirements. Therefore, efficient solution...
— In this paper, based on a passivity framework, admittance-type and hybrid-type delay-compensated communication channel models are introduced, which warrant different bilateral ...
Arash Aziminejad, Mahdi Tavakoli, Rajnikant V. Pat...