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» Architectures for function evaluation on FPGAs
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DAC
2005
ACM
13 years 9 months ago
A combined feasibility and performance macromodel for analog circuits
The need to reuse the performance macromodels of an analog circuit topology challenges existing regression based modeling techniques. A model of good reusability should have a num...
Mengmeng Ding, Ranga Vemuri
CAINE
2006
13 years 9 months ago
A multiobjective evolutionary approach for constrained joint source code optimization
The synergy of software and hardware leads to efficient application expression profile (AEP) not only in terms of execution time and energy but also optimal architecture usage. We...
Naeem Zafar Azeemi
VEE
2010
ACM
327views Virtualization» more  VEE 2010»
14 years 2 months ago
AASH: an asymmetry-aware scheduler for hypervisors
Asymmetric multicore processors (AMP) consist of cores exposing the same instruction-set architecture (ISA) but varying in size, frequency, power consumption and performance. AMPs...
Vahid Kazempour, Ali Kamali, Alexandra Fedorova
EDBT
2004
ACM
143views Database» more  EDBT 2004»
14 years 7 months ago
OGSA-DQP: A Service for Distributed Querying on the Grid
OGSA-DQP is a distributed query processor exposed to users as an Open Grid Services Architecture (OGSA)-compliant Grid service. This service supports the compilation and evaluation...
M. Nedim Alpdemir, Arijit Mukherjee, Anastasios Go...
APCSAC
2006
IEEE
14 years 1 months ago
A High Performance Simulator System for a Multiprocessor System Based on a Multi-way Cluster
In the ubiquitous era, it is necessary to research the architectures of multiprocessor system with high performance and low power consumption. A simulator developed in high level l...
Arata Shinozaki, Masatoshi Shima, Minyi Guo, Mitsu...