643 search results - page 13 / 129 » Architectures for function evaluation on FPGAs |
TCAD
2008
13 years 7 months ago
2008
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
VLSISP
2010
13 years 2 months ago
2010
We propose a new parallelization scheme for the hmmsearch function of the HMMER software, in order to target FPGA technology. hmmsearch is a very compute intensive software for bio...
ASAP
2008
IEEE
14 years 2 months ago
2008
IEEE
Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimi...
FPGA
2000
ACM
13 years 11 months ago
2000
ACM
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
FPL
2005
Springer
14 years 1 months ago
2005
Springer
This paper describes a novel Field Programmable Gate Array (FPGA) logic synthesis technique which determines if a logic function can be implemented in a given programmable circuit...