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» Architectures for function evaluation on FPGAs
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IPPS
2006
IEEE
14 years 1 months ago
Architecture of a multi-context FPGA using a hybrid multiple-valued/binary context switching signal
Multi-context FPGAs have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. Large amount of memory causes significant ove...
Yoshihiro Nakatani, Masanori Hariyama, Michitaka K...
FPL
2009
Springer
172views Hardware» more  FPL 2009»
14 years 10 days ago
Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor...
Nachiket Kapre, André DeHon
ESWS
2008
Springer
13 years 9 months ago
A Functional Semantic Web Architecture
A layered architecture for the Semantic Web that adheres to software engineering principles and the fundamental aspects of layered architectures will assist in the development of S...
Aurona Gerber, Alta van der Merwe, Andries Barnard
ISLPED
2010
ACM
231views Hardware» more  ISLPED 2010»
13 years 8 months ago
3D-nonFAR: three-dimensional non-volatile FPGA architecture using phase change memory
Memories play a key role in FGPAs in the forms of both programming bits and embedded memory blocks. FPGAs using non-volatile memories have been the focus of attention with zero bo...
Yibo Chen, Jishen Zhao, Yuan Xie
VLSISP
2011
358views Database» more  VLSISP 2011»
13 years 2 months ago
Accelerating Machine-Learning Algorithms on FPGAs using Pattern-Based Decomposition
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
Karthik Nagarajan, Brian Holland, Alan D. George, ...