Sciweavers

643 search results - page 27 / 129
» Architectures for function evaluation on FPGAs
Sort
View
ERSA
2008
185views Hardware» more  ERSA 2008»
13 years 9 months ago
Design Framework for Partial Run-Time FPGA Reconfiguration
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
Chris Conger, Ann Gordon-Ross, Alan D. George
FMCAD
2000
Springer
13 years 11 months ago
Formal Verification of Floating Point Trigonometric Functions
Abstract. We have formal verified a number of algorithms for evaluating transcendental functions in double-extended precision floating point arithmetic in the Intel
John Harrison
MIS
2008
Springer
191views Multimedia» more  MIS 2008»
13 years 7 months ago
QoS management and control for an all-IP WiMAX network architecture: Design, implementation and evaluation
The IEEE 802.16 standard provides a specification for a fixed and mobile broadband wireless access system, offering high data rate transmission of multimedia services with differen...
Thomas Michael Bohnert, Marco Castrucci, Nicola Ci...
FCCM
2008
IEEE
176views VLSI» more  FCCM 2008»
13 years 8 months ago
The Effectiveness of Configuration Merging in Point-to-Point Networks for Module-based FPGA Reconfiguration
Communications infrastructure for modular reconfiguration of FPGAs needs to support the changing communications interfaces of a sequence of modules. In order to avoid the overhead...
Shannon Koh, Oliver Diessel
SIGIR
1996
ACM
13 years 12 months ago
Performance Evaluation of a Distributed Architecture for Information Retrieval
Information explosion across the Internet and elsewhere offers access to an increasing number of document collections. In order for users to e ectively access these collections, i...
Brendon Cahoon, Kathryn S. McKinley