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» Architectures for function evaluation on FPGAs
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FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 4 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
IADIS
2003
13 years 11 months ago
A Flexible Approach to Semi-Automatic Accessibility Evaluation
Experience in preparing Web content for people with visual disabilities shows that automatic testing of accessibility is clearly insufficient to meet real-world demands, and that ...
Mireille Blay-Fornarino, Karima Boudaoud, Anne-Mar...
DATE
2009
IEEE
105views Hardware» more  DATE 2009»
14 years 5 months ago
UMTS MPSoC design evaluation using a system level design framework
Rapid design space exploration with accurate models is necessary to improve designer productivity at the electronic system level. We describe how to use a new event-based design f...
Douglas Densmore, Alena Simalatsar, Abhijit Davare...
ERCIMDL
2005
Springer
91views Education» more  ERCIMDL 2005»
14 years 3 months ago
LibraRing: An Architecture for Distributed Digital Libraries Based on DHTs
We present a digital library architecture based on distributed hash tables. We discuss the main components of this architecture and the protocols for offering information retrieva...
Christos Tryfonopoulos, Stratos Idreos, Manolis Ko...
SAFECOMP
2007
Springer
14 years 4 months ago
Experimental Evaluation of the DECOS Fault-Tolerant Communication Layer
This paper presents an experimental evaluation of the fault-tolerant communication (FTCOM) layer of the DECOS integrated architecture. The FTCOM layer implements different agreemen...
Jonny Vinter, Henrik Eriksson, Astrit Ademaj, Bern...