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GLVLSI
2007
IEEE
173views VLSI» more  GLVLSI 2007»
13 years 7 months ago
Modeling and estimating leakage current in series-parallel CMOS networks
This paper reviews the modeling of subthreshold leakage current and proposes an improved model for general series-parallel CMOS networks. The presence of on-switches in off-networ...
Paulo F. Butzen, André Inácio Reis, ...
HICSS
2008
IEEE
110views Biometrics» more  HICSS 2008»
14 years 1 months ago
Gathering Experience Knowledge from Iterative Software Development Processes
This paper proposes that experience knowledge would be beneficial for iterative software development. In this paper, experience knowledgebased artifacts have been linked to Extrem...
Jouni Kokkoniemi
DAC
1994
ACM
13 years 11 months ago
The Design of High-Performance Microprocessors at Digital
Today's high-performance single-chip CMOS microprocessors are the most complex and challenging chip designs ever implemented. To stay on the leading edge, Digital's micro...
Thomas F. Fox
VTC
2008
IEEE
110views Communications» more  VTC 2008»
14 years 1 months ago
EXIT Chart Aided Design of Near-Capacity Self-Concatenated Trellis Coded Modulation Using Iterative Decoding
Abstract— In this contribution we design the Iteratively Decoded Self-Concatenated Convolutional Codes (SECCC-ID) using Extrinsic Information Transfer (EXIT) charts. Good constit...
Muhammad Fasih Uddin Butt, Soon Xin Ng, Lajos Hanz...
IPPS
2000
IEEE
13 years 12 months ago
Memory Management in a Combined VIA/SCI Hardware
Abstract In this document we make a brief review of memory management and DMA considerations in case of common SCI hardware and the Virtual Interface Architecture. On this basis we...
Mario Trams, Wolfgang Rehm, Daniel Balkanski, Stan...