In this paper, a thorough bottom-up optimization process (field, point and scalar arithmetic) is used to speed up the computation of elliptic curve point multiplication and report ...
Abstract. This paper presents a design-space exploration of an applicationspecific instruction-set processor (ASIP) for the computation of various cryptographic pairings over Barre...
David Kammler, Diandian Zhang, Dominik Auras, Gerd...
As FPGA devices become larger, more coarse-grain modules coupled with large scale reconfigurable fabric become available, thus enabling new classes of applications to run effici...
1 The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in rst time. The new representation of logic...
The implementation of a correctly rounded or interval elementary function needs to be proven carefully in the very last details. The proof requires a tight bound on the overall er...
Florent de Dinechin, Christoph Quirin Lauter, Guil...