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IFIP
1993
Springer
14 years 2 months ago
Self-Timed Architecture of a Reduced Instruction Set Computer
An advanced Self-Timed Reduced Instruction Set Computer (ST-RISC) architecture is described. It is designed hierarchically, and is formally specified functionally at the various ...
Ilana David, Ran Ginosar, Michael Yoeli
ADT
2010
13 years 8 months ago
Survey of NLOS identification and error mitigation problems in UWB-based positioning algorithms for dense environments
Abstract In this survey, the currently available ultrawideband-based non-line-of-sight (NLOS) identification and error mitigation methods are presented. They are classified into se...
Jasurbek Khodjaev, Yongwan Park, Aamir Saeed Malik
ICSE
2003
IEEE-ACM
14 years 10 months ago
Pluggable Reflection: Decoupling Meta-Interface and Implementation
Reflection remains a second-class citizen in current programming models, where it's assumed to be imperative and tightly bound to its implementation. In contrast, most object...
David H. Lorenz, John M. Vlissides
EMSOFT
2007
Springer
14 years 4 months ago
WCET estimation for executables in the presence of data caches
This paper describes techniques to estimate the worst case execution time of executable code on architectures with data caches. The underlying mechanism is Abstract Interpretation...
Rathijit Sen, Y. N. Srikant
POPL
2012
ACM
12 years 5 months ago
Playing in the grey area of proofs
Interpolation is an important technique in verification and static analysis of programs. In particular, interpolants extracted from proofs of various properties are used in invar...
Krystof Hoder, Laura Kovács, Andrei Voronko...