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ARC
2009
Springer
175views Hardware» more  ARC 2009»
14 years 2 months ago
A Hardware Accelerated Simulation Environment for Spiking Neural Networks
Spiking Neural Networks (SNNs) model the biological functions of the human brain enabling neuro/computer scientists to investigate how arrays of neurons can be used to solve comput...
Brendan P. Glackin, Jim Harkin, T. Martin McGinnit...
SEMWEB
2005
Springer
14 years 1 months ago
Representing Web Service Policies in OWL-DL
Abstract. Recently, there have been a number of proposals for languages for expressing web service constraints and capabilities, with WSPolicy and WSPL leading the way. The propose...
Vladimir Kolovski, Bijan Parsia, Yarden Katz, Jame...
COLT
2006
Springer
13 years 11 months ago
Continuous Experts and the Binning Algorithm
Abstract. We consider the design of online master algorithms for combining the predictions from a set of experts where the absolute loss of the master is to be close to the absolut...
Jacob Abernethy, John Langford, Manfred K. Warmuth
ARC
2008
Springer
104views Hardware» more  ARC 2008»
13 years 9 months ago
PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
Frank Hannig, Holger Ruckdeschel, Hritam Dutta, J&...
ASM
2008
ASM
13 years 9 months ago
Formal Modeling and Analysis of a Flash Filesystem in Alloy
This paper describes the formal modeling and analysis of a design for a flash-based filesystem in Alloy. We model the basic operations of a filesystem as well as features that are ...
Eunsuk Kang, Daniel Jackson