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» Array SSA Form and Its Use in Parallelization
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ICCD
1999
IEEE
122views Hardware» more  ICCD 1999»
13 years 11 months ago
Design and Evaluation of a Selective Compressed Memory System
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
Jang-Soo Lee, Won-Kee Hong, Shin-Dug Kim
AMAST
2008
Springer
13 years 9 months ago
System Demonstration of Spiral: Generator for High-Performance Linear Transform Libraries
We demonstrate Spiral, a domain-specific library generation system. Spiral generates high performance source code for linear transforms (such as the discrete Fourier transform and ...
Yevgen Voronenko, Franz Franchetti, Fréd&ea...
VISUALIZATION
1998
IEEE
13 years 11 months ago
Eliminating popping artifacts in sheet buffer-based splatting
Splatting is a fast volume rendering algorithm which achieves its speed by projecting voxels in the form of pre-integrated interpolation kernels, or splats. Presently, two main va...
Klaus Mueller, Roger Crawfis
PPOPP
2010
ACM
14 years 4 months ago
The LOFAR correlator: implementation and performance analysis
LOFAR is the first of a new generation of radio telescopes. Rather than using expensive dishes, it forms a distributed sensor network that combines the signals from many thousands...
John W. Romein, P. Chris Broekema, Jan David Mol, ...
ICPP
1997
IEEE
13 years 11 months ago
The Affinity Entry Consistency Protocol
In this paper we propose a novel software-only distributed sharedmemory system (SW-DSM), the Affinity Entry Consistency (AEC) protocol. The protocol is based on Entry Consistency ...
Cristiana Bentes Seidel, Ricardo Bianchini, Claudi...