Sciweavers

54 search results - page 6 / 11
» Artificial Neural Networks Processor - A Hardware Implementa...
Sort
View
RECONFIG
2008
IEEE
225views VLSI» more  RECONFIG 2008»
14 years 1 months ago
A Hardware Filesystem Implementation for High-Speed Secondary Storage
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
Ashwin A. Mendon, Ron Sass
ISNN
2005
Springer
14 years 1 months ago
FPGA Realization of a Radial Basis Function Based Nonlinear Channel Equalizer
In this paper we propose a radial basis function (RBF) neural network for nonlinear time-invariant channel equalizer. The RBF network model has a three-layer structure which is com...
Poyueh Chen, Hungming Tsai, ChengJian Lin, ChiYung...
EH
2005
IEEE
158views Hardware» more  EH 2005»
14 years 1 months ago
Hardware Evolution of Analog Circuits for In-situ Robotic Fault-Recovery
We present a method for evolving and implementing artificial neural networks (ANNs) on Field Programmable Analog Arrays (FPAAs). These FPAAs offer the small size and low power usa...
Dmitry Berenson, Nicolás S. Estévez,...
CCECE
2006
IEEE
14 years 1 months ago
A Hardware/Software Co-Design for RSVP-TE MPLS
This paper presents a hardware/software co-design for Multi Protocol Label Switching (MPLS) using RSVP-TE as a signaling protocol. MPLS is the protocol framework on which the atte...
Raymond Peterkin, Dan Ionescu
JCP
2008
126views more  JCP 2008»
13 years 7 months ago
Hardware/Software Co-design Approach for an ADALINE Based Adaptive Control System
Abstract--In this paper, we report some results on hardware and software co-design of an adaptive linear neuron (ADALINE) based control system. A discrete-time Proportional-Integra...
Shouling He, Xuping Xu