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EMSOFT
2006
Springer
13 years 11 months ago
Modeling a system controller for timing analysis
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
Stephan Thesing
ENTCS
2006
127views more  ENTCS 2006»
13 years 7 months ago
Component Identification Through Program Slicing
This paper reports on the development of specific slicing techniques for functional programs and their use for the identification of possible coherent components from monolithic c...
Nuno F. Rodrigues, Luís Soares Barbosa
FMSD
1998
77views more  FMSD 1998»
13 years 7 months ago
An Analysis of Bitstate Hashing
The bitstate hashing, or supertrace, technique was introduced in 1987 as a method to increase the quality of verification by reachability analyses for applications that defeat anal...
Gerard J. Holzmann
TCAD
2002
98views more  TCAD 2002»
13 years 7 months ago
Reporting of standard cell placement results
VLSI fabrication technology has advanced rapidly, bringing with it a strong demand for faster and better design automation tools. Accurate reporting of results for placement appro...
Patrick H. Madden
SIGPLAN
2008
13 years 7 months ago
Languages and performance engineering: method, instrumentation, and pedagogy
Programs encounter increasingly complex and fragile mappings to computing platforms, resulting in performance characteristics that are often mysterious to students, practitioners,...
Doug Lea, David F. Bacon, David Grove