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CAISE
2007
Springer
13 years 11 months ago
Formalization and Verification of EPCs with OR-Joins Based on State and Context
The semantics of the OR-join in business process modeling languages like EPCs or YAWL have been discussed for a while. Still, the existing solutions suffer from at least one of two...
Jan Mendling, Wil M. P. van der Aalst
ICESS
2005
Springer
14 years 26 days ago
Formalization of fFSM Model and Its Verification
PeaCE(Ptolemy extension as a Codesign Environment) was developed for the hardware and software codesign framework which allows us to express both data flow and control flow. The fF...
Sachoun Park, Gihwon Kwon, Soonhoi Ha
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
14 years 2 months ago
Learning early-stage platform dimensioning from late-stage timing verification
— Today's innovations in the automotive sector are, to a great extent, based on electronics. The increasing integration complexity and stringent cost reduction goals turn E/...
Kai Richter, Marek Jersak, Rolf Ernst
ISARCS
2010
156views Hardware» more  ISARCS 2010»
13 years 9 months ago
A Road to a Formally Verified General-Purpose Operating System
Methods of formal description and verification represent a viable way for achieving fundamentally bug-free software. However, in reality only a small subset of the existing operati...
Martin Decký
CSCW
2008
ACM
13 years 9 months ago
Collaboration and interference: awareness with mice or touch input
Multi-touch surfaces are becoming increasingly popular. An assumed benefit is that they can facilitate collaborative interactions in co-located groups. In particular, being able t...
Eva Hornecker, Paul Marshall, Nick Sheep Dalton, Y...