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WWW
2010
ACM
14 years 3 months ago
A client-server architecture for state-dependent dynamic visualizations on the web
As sophisticated enterprise applications move to the Web, some advanced user experiences become difficult to migrate due to prohibitively high computation, memory, and bandwidth r...
Daniel Coffman, Danny Soroker, Chandra Narayanaswa...
VEE
2009
ACM
107views Virtualization» more  VEE 2009»
14 years 3 months ago
Architectural support for shadow memory in multiprocessors
Runtime monitoring support serves as a foundation for the important tasks of providing security, performing debugging, and improving performance of applications. Often runtime mon...
Vijay Nagarajan, Rajiv Gupta
ISCA
2009
IEEE
137views Hardware» more  ISCA 2009»
14 years 3 months ago
A case for an interleaving constrained shared-memory multi-processor
Shared-memory multi-threaded programming is inherently more difficult than single-threaded programming. The main source of complexity is that, the threads of an application can in...
Jie Yu, Satish Narayanasamy
CODES
2007
IEEE
14 years 2 months ago
Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
Andreas Hansson, Martijn Coenen, Kees Goossens
CODES
2006
IEEE
14 years 2 months ago
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
Martijn Coenen, Srinivasan Murali, Andrei Radulesc...