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ICS
1999
Tsinghua U.
14 years 21 days ago
Nonlinear array layouts for hierarchical memory systems
Programming languages that provide multidimensional arrays and a flat linear model of memory must implement a mapping between these two domains to order array elements in memory....
Siddhartha Chatterjee, Vibhor V. Jain, Alvin R. Le...
DATE
2010
IEEE
195views Hardware» more  DATE 2010»
13 years 10 months ago
Cool MPSoC programming
Abstract--This paper summarizes a special session on multicore/multi-processor system-on-chip (MPSoC) programming challenges. Wireless multimedia terminals are among the key driver...
Rainer Leupers, Lothar Thiele, Xiaoning Nie, Bart ...
IPPS
2010
IEEE
13 years 6 months ago
Structuring the execution of OpenMP applications for multicore architectures
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
François Broquedis, Olivier Aumage, Brice G...
CODES
2011
IEEE
12 years 8 months ago
DistRM: distributed resource management for on-chip many-core systems
The trend towards many-core systems comes with various issues, among them their highly dynamic and non-predictable workloads. Hence, new paradigms for managing resources of many-c...
Sebastian Kobbe, Lars Bauer, Daniel Lohmann, Wolfg...
SP
2008
IEEE
122views Security Privacy» more  SP 2008»
13 years 8 months ago
Large-scale phylogenetic analysis on current HPC architectures
Abstract. Phylogenetic inference is considered a grand challenge in Bioinformatics due to its immense computational requirements. The increasing popularity and availability of larg...
Michael Ott, Jaroslaw Zola, Srinivas Aluru, Andrew...