51 search results - page 8 / 11 » Asynchronous DRAM Design and Synthesis |
DAC
1995
ACM
13 years 10 months ago
1995
ACM
Abstract— Many asynchronous designs are naturally specified and implemented hierarchically as an interconnection of separate asynchronous modules that operate concurrently and c...
ASPDAC
2001
ACM
13 years 10 months ago
2001
ACM
This paper describes a novel approach to high-level synthesis of complex pipelined circuits, including pipelined circuits with feedback. This approach combines a high-level, modula...
UIST
1992
ACM
13 years 11 months ago
1992
ACM
Distributed clientisewer models are becoming increasingly prevalent in multimedia systems and advanced user interface design. A multimedia application, for example, may play and r...
CBSE
2005
Springer
14 years 13 days ago
2005
Springer
We consider a class of component-based software models with interaction style of buffered asynchronous message passing between components with ports, represented by UML-RT. After ...
ASYNC
1997
IEEE
13 years 10 months ago
1997
IEEE
This paper presents new timing analysis algorithms for efficient state space exploration during timed circuit synthesis. Timed circuits are a class of asynchronous circuits that i...