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FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
14 years 1 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
SIGMETRICS
2008
ACM
214views Hardware» more  SIGMETRICS 2008»
13 years 8 months ago
HMTT: a platform independent full-system memory trace monitoring system
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu, Jianp...
HPCA
2009
IEEE
14 years 9 months ago
Techniques for bandwidth-efficient prefetching of linked data structures in hybrid prefetching systems
Linked data structure (LDS) accesses are critical to the performance of many large scale applications. Techniques have been proposed to prefetch such accesses. Unfortunately, many...
Eiman Ebrahimi, Onur Mutlu, Yale N. Patt
LISA
2001
13 years 10 months ago
The CoralReef Software Suite as a Tool for System and Network Administrators
Until now, system administrators have lacked a flexible real-time network traffic flow monitoring package. Such a package must provide a wide range of services but remain flexible ...
David Moore, Ken Keys, Ryan Koga, Edouard Lagache,...
RTAS
1998
IEEE
14 years 1 months ago
End-Host Architecture for QoS-Adaptive Communication
Proliferation of communication-intensive real-time applications with elastic" timeliness constraints, such as streaming stored video, requires a new design for endhost commun...
Tarek F. Abdelzaher, Kang G. Shin