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DATE
2003
IEEE
132views Hardware» more  DATE 2003»
14 years 23 days ago
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
Youngchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung C...
CGO
2007
IEEE
14 years 1 months ago
Run-Time Support for Optimizations Based on Escape Analysis
The JavaTM programming language does not allow the programmer to influence memory management. An object is usually allocated on the heap and deallocated by the garbage collector ...
Thomas Kotzmann, Hanspeter Mössenböck
PLDI
2011
ACM
12 years 10 months ago
Separation logic + superposition calculus = heap theorem prover
Program analysis and verification tools crucially depend on the ability to symbolically describe and reason about sets of program behaviors. Separation logic provides a promising...
Juan Antonio Navarro Pérez, Andrey Rybalche...
ENTCS
2002
181views more  ENTCS 2002»
13 years 7 months ago
Alias verification for Fortran code optimization
Abstract: Alias analysis for Fortran is less complicated than for programming languages with pointers but many real Fortran programs violate the standard: a formal parameter or a c...
Thi Viet Nga Nguyen, François Irigoin
BMCBI
2005
99views more  BMCBI 2005»
13 years 7 months ago
Effective ambiguity checking in biosequence analysis
Background: Ambiguity is a problem in biosequence analysis that arises in various analysis tasks solved via dynamic programming, and in particular, in the modeling of families of ...
Janina Reeder, Peter Steffen, Robert Giegerich