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DATE
2003
IEEE
109views Hardware» more  DATE 2003»
14 years 1 months ago
A Novel Metric for Interconnect Architecture Performance
We propose a new metric for evaluation of interconnect architectures. This metric is computed by optimal assignment of wires from a given wire length distribution (WLD) to a given...
Parthasarathi Dasgupta, Andrew B. Kahng, Swamy Mud...
ANSS
2002
IEEE
14 years 21 days ago
Temporal Uncertainty Time Warp: An Agent-Based Implementation
This paper introduces TUTW – Temporal Uncertainty Time Warp – a control engine designed for an exploitation of temporal uncertainty (TU) in general optimistic simulations, and...
Roberto Beraldi, Libero Nigro, Antonino Orlando, F...
APSEC
2002
IEEE
14 years 21 days ago
Using Process Simulation to Compare Scheduling Strategies for Software Projects
We present a discrete simulation model for software projects which explicitly takes a scheduling strategy as input. The model represents varying staff skill levels, component coup...
Frank Padberg
ISCA
2002
IEEE
82views Hardware» more  ISCA 2002»
14 years 20 days ago
Increasing Processor Performance by Implementing Deeper Pipelines
One architectural method for increasing processor performance involves increasing the frequency by implementing deeper pipelines. This paper will explore the relationship between ...
Eric Sprangle, Doug Carmean
IFIP
2001
Springer
14 years 5 days ago
Cultivating Recalcitrance in Information Systems Research
There is an ongoing debate about how to improve the quality of empirical research efforts in information systems. One of the persistent issues within the debate concerns the relat...
Carsten Sørensen, Edgar A. Whitley, Shirin ...