338 search results - page 58 / 68 » Automated Performance Prediction of Message-Passing Parallel... |
APPT
2009
Springer
14 years 3 months ago
2009
Springer
Abstract. With more cores integrated into one single chip, the overall power consumption from the multiple concurrent running programs increases dramatically in a CMP processor whi...
ICS
1989
Tsinghua U.
14 years 15 days ago
1989
Tsinghua U.
Control intensive scalar programs pose a very different challenge to highly pipelined supercomputers than vectorizable numeric applications. Function call/return and branch instru...
IEEEPACT
2002
IEEE
14 years 1 months ago
2002
IEEE
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
HPCA
2003
IEEE
14 years 8 months ago
2003
IEEE
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
ICPADS
2010
IEEE
13 years 6 months ago
2010
IEEE
To fully tap into the potential of heterogeneous machines composed of multicore processors and multiple accelerators, simple offloading approaches in which the main trunk of the ap...