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MICRO
1995
IEEE
102views Hardware» more  MICRO 1995»
13 years 11 months ago
Zero-cycle loads: microarchitecture support for reducing load latency
Untolerated load instruction latencies often have a significant impact on overall program performance. As one means of mitigating this effect, we present an aggressive hardware-b...
Todd M. Austin, Gurindar S. Sohi
FTEDA
2006
208views more  FTEDA 2006»
13 years 8 months ago
FPGA Design Automation: A Survey
Design automation or computer-aided design (CAD) for field programmable gate arrays (FPGAs) has played a critical role in the rapid advancement and adoption of FPGA technology ove...
Deming Chen, Jason Cong, Peichen Pan
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
14 years 2 months ago
Automated design of application specific superscalar processors: an analytical approach
Analytical modeling is applied to the automated design of application-specific superscalar processors. Using an analytical method bridges the gap between the size of the design sp...
Tejas Karkhanis, James E. Smith
ERSA
2010
186views Hardware» more  ERSA 2010»
13 years 6 months ago
DAPR: Design Automation for Partially Reconfigurable FPGAs
Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requirements...
Shaon Yousuf, Ann Gordon-Ross
MSE
1999
IEEE
110views Hardware» more  MSE 1999»
14 years 11 days ago
Active Learning in an Electronic Design Automation Course
This paper summarizes the rationale behind revision of an electronic design automation course and the resulting learning objectives and course model. Early experiences are highlig...
Diane T. Rover, Nayda G. Santiago, Mel M. Tsai