25 search results - page 4 / 5 » Automated Verification: Graphs, Logic, and Automata |
SIGSOFT
2007
ACM
14 years 11 months ago
2007
ACM
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
CADE
2008
Springer
14 years 11 months ago
2008
Springer
Security protocols are small programs designed to ensure properties such as secrecy of messages or authentication of parties in a hostile environment. In this paper we investigate ...
CADE
2002
Springer
14 years 11 months ago
2002
Springer
Abstract. We investigate the combination of propositional SAT checkers with domain-specific theorem provers as a foundation for bounded model checking over infinite domains. Given ...
VMCAI
2010
Springer
14 years 8 months ago
2010
Springer
Abstract. Techniques such as verification condition generation, preditraction, and expressive type systems reduce software verification to proving formulas in expressive logics. Pr...
DAC
2006
ACM
14 years 11 months ago
2006
ACM
SAT sweeping is a method for simplifying an AND/INVERTER graph (AIG) by systematically merging graph vertices from the inputs towards the outputs using a combination of structural...