67 search results - page 10 / 14 » Automated transistor sizing for FPGA architecture exploratio... |
JSA
2007
13 years 7 months ago
2007
Mapping of applications on a Multiprocessor System-on-Chip (MP-SoC) is a crucial step to optimize performance, energy and memory constraints at the same time. The problem is formu...
PDP
2011
IEEE
12 years 11 months ago
2011
IEEE
Abstract—Continuously reducing transistor sizes and aggressive low power operating modes employed by modern architectures tend to increase transient error rates. Concurrently, mu...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...
AVSS
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents the implementation of a video segmentation unit used for embedded automated video surveillance systems. Various aspects of the underlying segmentation algorith...
ISCA
2007
IEEE
14 years 2 months ago
2007
IEEE
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities an...