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» Automatic Clock Abstraction from Sequential Circuits
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ICCD
1993
IEEE
124views Hardware» more  ICCD 1993»
13 years 11 months ago
Synthesis of Controllers from Interval Temporal Logic Specification
for a state machine which is an abstraction for an existing sequential circuit, which can be useful for redesign or engineering change. The generated state machines can be further ...
Masahiro Fujita, Shinji Kono
ICCAD
1993
IEEE
111views Hardware» more  ICCAD 1993»
13 years 11 months ago
Unifying synchronous/asynchronous state machine synthesis
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “bur...
Kenneth Y. Yun, David L. Dill
TOCL
2008
113views more  TOCL 2008»
13 years 7 months ago
Abstract state machines capture parallel algorithms: Correction and extension
State Machines Capture Parallel Algorithms: Correction and Extension ANDREAS BLASS University of Michigan and YURI GUREVICH Microsoft Research We consider parallel algorithms worki...
Andreas Blass, Yuri Gurevich
ICANN
2005
Springer
14 years 1 months ago
Building the Cerebellum in a Computer
Abstract. We have built a realistic computational model of the cerebellum. This model simulates the cerebellar cortex of the size 0.5mm×1mm consisting of several types of neurons,...
Tadashi Yamazaki, Shigeru Tanaka
TABLEAUX
1998
Springer
13 years 12 months ago
Model Checking: Historical Perspective and Example (Extended Abstract)
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...
Edmund M. Clarke, Sergey Berezin