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» Automatic Formal Model Generation and Analysis of SDL
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DATE
2005
IEEE
134views Hardware» more  DATE 2005»
14 years 1 months ago
Assertion-Based Design Exploration of DVS in Network Processor Architectures
With the scaling of technology and higher requirements on performance and functionality, power dissipation is becoming one of the major design considerations in the development of...
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang 000...
INLG
2010
Springer
13 years 5 months ago
Finding Common Ground: Towards a Surface Realisation Shared Task
In many areas of NLP reuse of utility tools such as parsers and POS taggers is now common, but this is still rare in NLG. The subfield of surface realisation has perhaps come clos...
Anja Belz, Mike White, Josef van Genabith, Deirdre...
SIGSOFT
2010
ACM
13 years 5 months ago
Scalable SMT-based verification of GPU kernel functions
Interest in Graphical Processing Units (GPUs) is skyrocketing due to their potential to yield spectacular performance on many important computing applications. Unfortunately, writ...
Guodong Li, Ganesh Gopalakrishnan
SIGSOFT
2005
ACM
14 years 8 months ago
Permissive interfaces
A modular program analysis considers components independently and provides succinct summaries for each component, which can be used when checking the rest of the system. Consider ...
Thomas A. Henzinger, Ranjit Jhala, Rupak Majumdar
CAISE
2000
Springer
13 years 12 months ago
An Overview of RoZ: A Tool for Integrating UML and Z Specifications
This paper presents an approach and a tool to increase specification quality by using a combination of UML and formal languages. Our approach is based on the expression of the UML ...
Sophie Dupuy, Yves Ledru, Monique Chabre-Peccoud