Sciweavers

781 search results - page 8 / 157
» Automatic Formal Model Generation and Analysis of SDL
Sort
View
ECBS
2005
IEEE
160views Hardware» more  ECBS 2005»
14 years 1 months ago
Traceability-Driven Model Refinement for Test Case Generation
Testing complex Computer-Based Systems is not only a demanding but a very critical task. Therefore the use of models for generating test data is an important goal. Tool support du...
Matthias Riebisch, Michael Hübner
DATE
2009
IEEE
90views Hardware» more  DATE 2009»
14 years 2 months ago
Property analysis and design understanding
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
Ulrich Kühne, Daniel Große, Rolf Drechs...
CAISE
2006
Springer
13 years 11 months ago
Validation of Regulation Documents by Automated Analysis of Formal Models
Abstract. The security of civil aviation is regulated by a series of international standards and recommended practices. The EDEMOI project aims at investigating different technique...
Didier Bert, Fabrice Bouquet, Yves Ledru, Sylvie V...
FMCO
2003
Springer
154views Formal Methods» more  FMCO 2003»
14 years 23 days ago
Tools for Generating and Analyzing Attack Graphs
Abstract. Attack graphs depict ways in which an adversary exploits system vulnerabilities to achieve a desired state. System administrators use attack graphs to determine how vulne...
Oleg Sheyner, Jeannette M. Wing
ICSE
2001
IEEE-ACM
13 years 12 months ago
A Scalable Formal Method for Design and Automatic Checking of User Interfaces
The paper addresses the formal specification, design and implementation of the behavioral component of graphical user interfaces. The complex sequences of visual events and action...
Jean Berstel, Stefano Crespi-Reghizzi, Gilles Rous...