Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winse...
This paper introduces a new method for generating test data that combines the benefits of equivalence partitioning, boundary value analysis and cause-effect analysis. It is suitab...
This paper shows how language technologies such as the automatic generation of parsers for analyzing user actions and visual parsing can be applied to build a flexible tool specia...
Abstract— Dissipation in the clock tree and state elements of ASIC designs is often a significant fraction of total energy consumption. We propose a methodology for recovering m...
Conrad H. Ziesler, Joohee Kim, Marios C. Papaefthy...
Research in floorplanning and block-packing has generated a variety of data structures to represent spatial configurations of circuit modules. Much of this work focuses on the g...