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119
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ECBS
1996
IEEE
93views Hardware» more  ECBS 1996»
15 years 8 months ago
A Methodology for Designing and Dimensioning Critical Complex Computing Systems
It is widely recognized that real-time,fault-tolerant and distributed computing technologies play a key role in the deployment of many current andfuture (civilian or Defense) crit...
Gérard Le Lann
118
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GLVLSI
2003
IEEE
130views VLSI» more  GLVLSI 2003»
15 years 9 months ago
Mixing ATPG and property checking for testing HW/SW interfaces
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such interfaces do not directly map a functionality of the system description, but ...
Alessandro Fin, Franco Fummi, Graziano Pravadelli
150
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FPGA
2003
ACM
138views FPGA» more  FPGA 2003»
15 years 9 months ago
Automatic transistor and physical design of FPGA tiles from an architectural specification
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron E...
97
Voted
MEMOCODE
2005
IEEE
15 years 9 months ago
Extended abstract: a race-free hardware modeling language
We describe race-free properties of a hardware description language called GEZEL. The language describes networks of cycle-true finite-state-machines with datapaths (FSMDs). We de...
Patrick Schaumont, Sandeep K. Shukla, Ingrid Verba...
117
Voted
FCCM
1998
IEEE
113views VLSI» more  FCCM 1998»
15 years 8 months ago
PAM-Blox: High Performance FPGA Design for Adaptive Computing
PAM-Blox are object-oriented circuit generators on top of the PCI Pamette design environment, PamDC. High- performance FPGA design for adaptive computing is simplified by using a ...
Oskar Mencer, Martin Morf, Michael J. Flynn