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143
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ARC
2010
Springer
183views Hardware» more  ARC 2010»
15 years 4 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
142
Voted
ICCCN
2008
IEEE
15 years 10 months ago
A Structured Hardware/Software Architecture for Embedded Sensor Nodes
—Owing to the limited requirement for sensor processing in early networked sensor nodes, embedded software was generally built around the communication stack. Modern sensor nodes...
Geoff V. Merrett, Alex S. Weddell, Nick R. Harris,...
ICECCS
2009
IEEE
161views Hardware» more  ICECCS 2009»
15 years 10 months ago
Formal Modelling and Analysis of Business Information Applications with Fault Tolerant Middleware
Distributed information systems are critical to the functioning of many businesses; designing them to be dependable is a challenging but important task. We report our experience i...
Jeremy Bryans, John S. Fitzgerald, Alexander Roman...
130
Voted
DATE
2009
IEEE
130views Hardware» more  DATE 2009»
15 years 10 months ago
Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA
—IP-XACT is a standard for describing intellectual property metadata for System-on-Chip (SoC) integration. Reesearchers have proposed visualizing and abstracting IP-XACT objects ...
Tero Arpinen, Tapio Koskinen, Erno Salminen, Timo ...
ITC
1999
IEEE
118views Hardware» more  ITC 1999»
15 years 8 months ago
Logic BIST for large industrial designs: real issues and case studies
This paper discusses practical issues involved in applying logic built-in self-test (BIST) to four large industrial designs. These multi-clock designs, ranging in size from 200K t...
Graham Hetherington, Tony Fryars, Nagesh Tamarapal...