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FPL
2004
Springer
142views Hardware» more  FPL 2004»
15 years 9 months ago
IP Generation for an FPGA-Based Audio DAC Sigma-Delta Converter
In this paper we describe a parameterizable FPGA-based implementation of a sigma-delta converter used in a 96kHz audio DAC. From specifications of the converter’s input bitwidth...
Ralf Ludewig, Oliver Soffke, Peter Zipf, Manfred G...
149
Voted
MEMOCODE
2003
IEEE
15 years 9 months ago
LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect
In the design process of SoC (System on Chip), validation is one of the most critical and costly activity. The main problem for industrial companies like STMicroelectronics, stand...
Pierre Wodey, Geoffrey Camarroque, Fabrice Baray, ...
ET
1998
99views more  ET 1998»
15 years 3 months ago
A Behavior Model for Next Generation Test Systems
Defining information required by automatic test systems frequently involves a description of system behavior. To facilitate capturing the required behavior information in the cont...
Lee A. Shombert, John W. Sheppard
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
15 years 9 months ago
SOFTENIT: a methodology for boosting the software content of system-on-chip designs
Embedded software is a preferred choice for implementing system functionality in modern System-on-Chip (SoC) designs, due to the high flexibility, and lower engineering costs pro...
Abhishek Mitra, Marcello Lajolo, Kanishka Lahiri
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
15 years 10 months ago
User-centric design space exploration for heterogeneous Network-on-Chip platforms
- In this paper, we present a design methodology for automatic platform generation of future heterogeneous systems where communication happens via the Network-onChip (NoC) approach...
Chen-Ling Chou, Radu Marculescu