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SIGGRAPH
2010
ACM
14 years 1 months ago
Popup: automatic paper architectures from 3D models
Paper architectures are 3D paper buildings created by folding and cutting. The creation process of paper architecture is often laborintensive and highly skill-demanding, even with...
Xian-Ying Li, Chao-Hui Shen, Shi-Sheng Huang, Tao ...
GECCO
2005
Springer
121views Optimization» more  GECCO 2005»
14 years 2 months ago
New evolutionary techniques for test-program generation for complex microprocessor cores
Checking if microprocessor cores are fully functional at the end of the productive process has become a major issue. Traditional functional approaches are not sufficient when cons...
Ernesto Sánchez, Massimiliano Schillaci, Ma...
FCCM
2005
IEEE
131views VLSI» more  FCCM 2005»
14 years 2 months ago
Automating the Layout of Reconfigurable Subsystems Using Circuit Generators
When designing systems-on-a-chip (SoCs), a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be ...
Shawn Phillips, Scott Hauck
NDSS
2007
IEEE
14 years 3 months ago
RICH: Automatically Protecting Against Integer-Based Vulnerabilities
We present the design and implementation of RICH (Run-time Integer CHecking), a tool for efficiently detecting integer-based attacks against C programs at run time. C integer bug...
David Brumley, Dawn Xiaodong Song, Tzi-cker Chiueh...
DAC
2000
ACM
14 years 9 months ago
Power minimization using control generated clocks
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
M. Srikanth Rao, S. K. Nandy