179 search results - page 14 / 36 » Automatic High Level Assertion Generation and Synthesis for ... |
IEEECIT
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper proposes a method of model-driven HW/SW co-design in embedded system design and discusses the key technology of model mapping, automatic generating codes and performanc...
ISPD
2012
ACM
12 years 3 months ago
2012
ACM
There are two prominent problems with technology scaling: increasing design complexity and more challenges with interconnect design, including routability. High-level synthesis ha...
DAC
1997
ACM
13 years 11 months ago
1997
ACM
This paper describes a fully automatic standard-cell layout synthesis system, CELLERITY. The system is flexible in supporting a wide variety of process technologies and a range of...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
Functional verification of systems is aimed at validating the integration of previously verified components. It deals with complex designs, and invariably suffers from scarce re...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
Industry’s demand for flexible embedded solutions providing high performance and short time-to-market has led to the development of configurable and extensible processors. The...