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SBACPAD
2009
IEEE
155views Hardware» more  SBACPAD 2009»
14 years 1 months ago
SPARC16: A New Compression Approach for the SPARC Architecture
RISC processors can be used to face the ever increasing demand for performance required by embedded systems. Nevertheless, this solution comes with the cost of poor code density. ...
Leonardo Luiz Ecco, Bruno Cardoso Lopes, Eduardo C...
DAC
2005
ACM
13 years 9 months ago
Hybrid simulation for embedded software energy estimation
Software energy estimation is a critical step in the design of energyefficient embedded systems. Instruction-level simulation techniques, despite several advances, remain too slo...
Anish Muttreja, Anand Raghunathan, Srivaths Ravi, ...
TC
2008
13 years 6 months ago
Secure Memory Accesses on Networks-on-Chip
Security is gaining relevance in the development of embedded devices. Toward a secure system at each level of design, this paper addresses security aspects related to Network-on-Ch...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
13 years 11 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for application−specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
ECRTS
2005
IEEE
14 years 17 days ago
Improved Schedulability Analysis of EDF on Multiprocessor Platforms
Multiprocessor hardware platforms are now being considered for embedded systems, due to their high computational power and little additional cost when compared to single processor...
Marko Bertogna, Michele Cirinei, Giuseppe Lipari