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DATE
2004
IEEE
175views Hardware» more  DATE 2004»
13 years 11 months ago
Breaking Instance-Independent Symmetries in Exact Graph Coloring
Code optimization and high level synthesis can be posed as constraint satisfaction and optimization problems, such as graph coloring used in register allocation. Graph coloring is...
Arathi Ramani, Fadi A. Aloul, Igor L. Markov, Kare...
DAC
2009
ACM
14 years 8 months ago
Multicore parallel min-cost flow algorithm for CAD applications
Computational complexity has been the primary challenge of many VLSI CAD applications. The emerging multicore and manycore microprocessors have the potential to offer scalable perf...
Yinghai Lu, Hai Zhou, Li Shang, Xuan Zeng
PRICAI
2004
Springer
14 years 23 days ago
Computational Methods for Identification of Human microRNA Precursors
MicroRNA (miRNA), one of non-coding RNAs (ncRNAs), regulates gene expression directly by arresting the messenger RNA (mRNA) translation, which is important for identifying putative...
Jin-Wu Nam, Wha-Jin Lee, Byoung-Tak Zhang
POPL
2009
ACM
14 years 8 months ago
Modular code generation from synchronous block diagrams: modularity vs. code size
We study modular, automatic code generation from hierarchical block diagrams with synchronous semantics. Such diagrams are the fundamental model behind widespread tools in the emb...
Roberto Lublinerman, Christian Szegedy, Stavros Tr...
HPCA
2009
IEEE
14 years 8 months ago
Design and implementation of software-managed caches for multicores with local memory
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
Sangmin Seo, Jaejin Lee, Zehra Sura