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» Automatic abstraction and verification of verilog models
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TSE
2010
148views more  TSE 2010»
13 years 5 months ago
Program Behavior Discovery and Verification: A Graph Grammar Approach
—Discovering program behaviors and functionalities can ease program comprehension and verification. Existing program analysis approaches have used text mining algorithms to infer...
Chunying Zhao, Jun Kong, Kang Zhang
PASTE
2004
ACM
14 years 22 days ago
Dynamically inferring temporal properties
Model checking requires a specification of the target system’s desirable properties, some of which are temporal. Formulating a property of the system based on either its abstrac...
Jinlin Yang, David Evans
KBSE
1999
IEEE
13 years 11 months ago
Modular and Incremental Analysis of Concurrent Software Systems
Modularization and abstraction are the keys to practical verification and analysis of large and complex systems. We present in an incremental methodology for the automatic analysi...
Hassen Saïdi
B
2007
Springer
13 years 11 months ago
Automatic Translation from Combined B and CSP Specification to Java Programs
Abstract. A recent contribution to the formal specification and verification of concurrent systems is the integration of the state- and event-based approaches B and CSP, specifical...
Letu Yang, Michael Poppleton
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 4 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz