190 search results - page 8 / 38 » Automatically Mapping Code on an Intelligent Memory Architec... |
AAAI
1994
13 years 8 months ago
1994
Abstract- Human episodic memory provides a seemingly unlimited storage for everyday experiences, and a retrieval system that allows us to access the experiences with partial activa...
CSREAESA
2006
13 years 8 months ago
2006
Modern processors have a small on-chip local memory for instructions. Usually it is in the form of a cache but in some cases it is an addressable memory. In the latter, the user is...
ASAP
2008
IEEE
13 years 9 months ago
2008
IEEE
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...
SCOPES
2004
Springer
14 years 22 days ago
2004
Springer
New embedded signal processing architectures are emerging that are composed of loosely coupled heterogeneous components like CPUs or DSPs, specialized IP cores, reconfigurable uni...
PLDI
2004
ACM
14 years 24 days ago
2004
ACM
When vectorizing for SIMD architectures that are commonly employed by today’s multimedia extensions, one of the new challenges that arise is the handling of memory alignment. Pr...