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CAV
2010
Springer
187views Hardware» more  CAV 2010»
14 years 2 months ago
Fences in Weak Memory Models
We present a class of relaxed memory models, defined in Coq, parameterised by the chosen permitted local reorderings of reads and writes, and the visibility of inter- and intra-pr...
Jade Alglave, Luc Maranget, Susmit Sarkar, Peter S...
DAC
2009
ACM
14 years 1 months ago
Reduction techniques for synchronous dataflow graphs
The Synchronous Dataflow (SDF) model of computation is popular for modelling the timing behaviour of real-time embedded hardware and software systems and applications. It is an es...
Marc Geilen
ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
14 years 1 months ago
Automated refinement checking of concurrent systems
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta
APCHI
2004
IEEE
14 years 1 months ago
inlineLink: Realization of Inline Expansion Link Methods on a Conventional Web Browser
Conventional web browsing displays a web page inside of a window. In conventional web browsing, following a link replaces the previous document entirely, and the readers tend to lo...
Motoki Miura, Buntarou Shizuki, Jiro Tanaka
ASPDAC
2004
ACM
94views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Improving simulation-based verification by means of formal methods
The design of complex systems is largely ruled by the time needed for verification. Even though formal methods can provide higher reliability, in practice often simulation based ve...
Görschwin Fey, Rolf Drechsler