We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program ...
Abstract This work studies the properties of finite automata recognizing vectors with real components, encoded positionally in a given integer numeration base. Such automata are us...
In this paper, we propose a new algorithm for proving the validity or invalidity of a pre/postcondition pair for a program. The algorithm is motivated by the success of the algori...
on Predicate Abstraction and Fair Termination Andreas Podelski Andrey Rybalchenko Max-Planck-Institut f?ur Informatik Saarbr?ucken, Germany Predicate abstraction is the basis of m...
We present an automated technique for generating compiler optimizations from examples of concrete programs before and after improvements have been made to them. The key technical ...