271 search results - page 31 / 55 » Bandwidth-Friendly Cache Hierarchy |
ACMMSP
2006
ACM
14 years 3 months ago
2006
ACM
Stencil-based kernels constitute the core of many scientific applications on block-structured grids. Unfortunately, these codes achieve a low fraction of peak performance, due pr...
DSD
2009
IEEE
14 years 1 months ago
2009
IEEE
Modern systems are able to put two or more processors on the same die (Chip Multiprocessors, CMP), each with its private caches, while the last level caches can be either private ...
HPCA
1997
IEEE
14 years 2 months ago
1997
IEEE
Processors with write-through caches typically require a write buffer to hide the write latency to the next level of memory hierarchy and to reduce write traffic. A write buffer ...
VLDB
2002
ACM
13 years 9 months ago
2002
ACM
Accurate prediction of operator execution time is a prerequisite for database query optimization. Although extensively studied for conventional disk-based DBMSs, cost modeling in ...
SC
1992
ACM
14 years 1 months ago
1992
ACM
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...