271 search results - page 32 / 55 » Bandwidth-Friendly Cache Hierarchy |
ICPP
2009
IEEE
14 years 4 months ago
2009
IEEE
Abstract—As Chip-Multiprocessor systems (CMP) have become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single c...
LCTRTS
2005
Springer
14 years 3 months ago
2005
Springer
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
ICALP
2003
Springer
14 years 3 months ago
2003
Springer
We consider the issues of implicitness and cache-obliviousness in the classical dictionary problem for n distinct keys over an unbounded and ordered universe. One finding in this ...
TKDE
2002
13 years 9 months ago
2002
As technological advances are made in software and hardware, the feasibility of accessing information "any time, anywhere" is becoming a reality. Furthermore, the diversi...
ISPDC
2010
IEEE
13 years 8 months ago
2010
IEEE
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...