271 search results - page 44 / 55 » Bandwidth-Friendly Cache Hierarchy |
HPCC
2007
Springer
14 years 4 months ago
2007
Springer
This paper presents a new algorithm for computing the singular value decomposition (SVD) on multilevel memory hierarchy architectures. This algorithm is based on one-sided JRS iter...
CODES
2003
IEEE
14 years 3 months ago
2003
IEEE
NAND flash memory has become an indispensable component in mobile embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cost and ...
PDP
2010
IEEE
14 years 2 months ago
2010
IEEE
The increasing numbers of cores, shared caches and memory nodes within machines introduces a complex hardware topology. High-performance computing applications now have to carefull...
IPPS
1999
IEEE
14 years 2 months ago
1999
IEEE
Software distributed shared memory (DSM) systems have successfully provided the illusion of shared memory on distributed memory machines. However, most software DSM systems use th...
EUROPAR
2006
Springer
14 years 1 months ago
2006
Springer
Abstract. This paper presents a study of performance optimization of dense matrix multiplication on IBM Cyclops-64(C64) chip architecture. Although much has been published on how t...