271 search results - page 46 / 55 » Bandwidth-Friendly Cache Hierarchy |
MSS
2003
IEEE
14 years 3 months ago
2003
IEEE
The functionality that is provided by Mass Storage Systems can be implemented using data grid technology. Data grids already provide many of the required features, including a log...
ISCA
1996
IEEE
14 years 2 months ago
1996
IEEE
Current high performance computer systems use complex, large superscalar CPUs that interface to the main memory through a hierarchy of caches and interconnect systems. These CPU-c...
ICS
2000
Tsinghua U.
14 years 1 months ago
2000
Tsinghua U.
Loop fusion is important to optimizing compilers because it is an important tool in managing the memory hierarchy. By fusing loops that use the same data elements, we can reduce t...
EUROPAR
2008
Springer
13 years 11 months ago
2008
Springer
We explore different prefetch distance-degree combinations and very simple, low-cost adaptive policies on a superscalar core with a high bandwidth, high capacity on-chip memory hie...
CG
2005
Springer
13 years 9 months ago
2005
Springer
We propose an efficient framework for dynamic cloud rendering. Base on the proposed simplified lighting model, the Shadow Relation Table (SRT) and Metaball Lighting Texture Databa...