271 search results - page 47 / 55 » Bandwidth-Friendly Cache Hierarchy |
SPE
1998
13 years 9 months ago
1998
This paper describes some basic experiments to see how fast various popular scripting and user-interface languages run on a spectrum of representative tasks. We found enormous var...
ISCA
2010
IEEE
14 years 2 months ago
2010
IEEE
SIMD organizations amortize the area and power of fetch, decode, and issue logic across multiple processing units in order to maximize throughput for a given area and power budget...
ASPLOS
2008
ACM
13 years 11 months ago
2008
ACM
Nested paging is a hardware solution for alleviating the software memory management overhead imposed by system virtualization. Nested paging complements existing page walk hardwar...
IPCCC
2007
IEEE
14 years 4 months ago
2007
IEEE
As Chip Multiprocessor (CMP) has become the mainstream in processor architectures, Intel and AMD have introduced their dual-core processors to the PC market. In this paper, perfor...
SYSTOR
2009
ACM
14 years 4 months ago
2009
ACM
A typical storage hierarchy comprises of components with varying performance and cost characteristics, providing multiple options for data placement. We propose and evaluate a hie...